1. Field of the Invention
The invention in general relates to the fabrication of layered superlattice materials, and more particularly to fabrication processes that provide low fatigue ferroelectric and reliable high dielectric constant integrated circuit devices that are unusually resistant to degradation.
2. Statement of the Problem
Copending U.S. patent application Ser. No. 07/965,190 filed Oct. 23, 1992 discloses that the layered superlattice materials discovered by G. A. Smolenskii, V. A. Isupov, and A. I. Agranovskaya (See Chapter 15 of the book, Ferroelectrics and Related Materials, ISSN 0275-9608, [V.3 of the series Ferroelectrics and Related Phenomena, 1984] edited by G. A. Smolenskii, especially sections 15.3-15) are far better suited for ferroelectric and high dielectric constant integrated circuit applications than any prior materials used for these applications. These layered superlattice materials comprise complex oxides of metals, such as strontium, calcium, barium, bismuth, cadmium, lead, titanium, tantalum, hafnium, tungsten, niobium, zirconium, bismuth, scandium, yttrium, lanthanum, antimony, chromium, and thallium that spontaneously form layered superlattices, i.e. crystalline lattices that include alternating layers of distinctly different sublattices, such as a ferroelectric and non-ferroelectric sublattices. Generally, each layered superlattice material will include two or more of the above metals; for example, strontium, bismuth and tantalum form the layered superlattice material strontium bismuth tantalate, SrBi.sub.2 Ta.sub.2 O.sub.9. Copending U.S. patent application Ser. No. 07/981,133, describes a method of fabricating layered superlattice thin films that results in electronic properties for these materials several times better than the best previously known. This disclosure more fully develops certain aspects of the previous application, and discloses improvements in the fabrication process that together approximately double the values of the critical ferroelectric parameters, such as the polarizability, over the values obtained with the basic process described in the copending 981,133 application.
In addition to having good values of the ferroelectric parameters, it is also important that the physical quality of the ferroelectric films be suitable for use in manufacturing processes. For example, the film should have a relatively uniform grain size, which results in better crystalline quality, i.e films free of cracks and other defects. The film grain size should also be small compared to the thickness of the film; otherwise the roughness of the film can be comparable to the thickness and other dimensions of the device components, which makes it difficult or impossible to fabricate devices within tolerances and results in short circuits and other electrical breakdowns. Further, it is important that the fabrication processes be ones that can be performed relatively rapidly, since long processes are more expensive in terms of the use of facilities and personnel.
Rapid thermal processing and furnace annealing in an atmosphere of oxygen are several of many processes that are well-known in the thin-film fabrication technology, See for example, "Process Optimization and Characterization of Device Worthy Sol-Gel Based PZT for Ferroelectric Memories", B. M. Melnick, J. D. Cuchiaro, L. D. McMillan, C. A. Paz De Araujo, and J. F. Scott in Ferroelectrics, Vol 109, pp. 1-23 (1990). It is also known to add excess lead in fabricating PZT using a spin-on and annealing process to account for lead lost as lead oxide vapor in the fabrication process. See U.S. Pat. No. 5,028,455 issued to William D. Miller et al. It is also known to add excess Bi.sub.2 O.sub.3 when fabricating a bismuth titanate thin film using sputtering to compensate for the loss of this component in the sputtering process. See "A New Ferroelectric Memory Device, Metal-Ferroelectric-Semiconductor Transistor", by Shu-Yau Wu, IEEE Transactions On Electron Devices, August 1974, pp. 499-504. E. C. Subbarao, in "A Family of Ferroelectric Bismuth Compounds", J. Phys. Chem. Solids, V. 23, pp. 665-676 (1962), discloses the creation of solid solutions of some layered superlattice materials and that several of their physical parameters, i.e., the dielectric constant and Curie temperature change as the proportions of the various elements comprising the solid solution change. However, these are only some of the hundreds of processes and parameters that potentially can affect the quality of a layered superlattice material, and prior to the work of the present inventors, how to use these and other fabrication parameters to arrive at ferroelectric properties such as extremely low fatigue rates and polarizabilities as high as 25 in layered superlattice materials was unknown, despite the fact that those skilled in the art had been searching for materials with such properties for more than thirty years.
It is a common practice to use recorded data regarding processes and materials in designing electronic devices. Generally, in designing electronic devices, one goes to literature to discover processes that result in the desired products, uses tables and similar recorded material to select materials with the desire properties, and likewise may use tables and similar sources to select the specific process parameters. However the data is scattered and disconnected. For example, the properties used in selecting materials and the processes used in fabricating a silicon-based electronic device are usually found in a different source and are not related in a systematic way to a the materials and processes used in fabricating a gallium arsenide-based electronic device. Despite the long history of integrated circuit manufacturing and the wealth of data available, as often as not the specifics of the materials and processes are selected through trial and error.